Research Overview

The proliferation of internet of things applications, such as smart manufacturing and smart transportation, has resulted in the explosion of artificial intelligence (AI) and big data. These applications heavily rely on complex AI and machine learning algorithms, requiring computational solutions to handle varying workloads. Power-intensive, costly, and legacy hardware such as central processing units limit the wide deployment of AI solutions. The demand for energy-efficient AI acceleration hardware at low capital costs is high.

According to Moore’s law, the number of transistors on a chipset is set to double every two years, boosting computational devices’ speed and performance capabilities. The conventional method to satisfy Moore’s law is by shrinking transistors. However, engineers are finding it increasingly difficult to reduce the size of transistors. AI acceleration hardware built upon traditional chipset architecture appears to be approaching a bottleneck due to design limitations. Stakeholders are forced to develop next-generation AI acceleration hardware architecture, resulting in performance disruption.

This Frost & Sullivan technology and innovation report offers insights and growth opportunities for AI acceleration hardware or AI accelerators.